Bhukhari should be sent to Pakistan, says Yogi Adityanath

[ranjeet]

Class toh bahut maazedar gayi thi bhai 3 nayi choriyan aayi hai class mein teeno patole
Par teacher nee project de rakha hai Website design karni hai Institute ke liye 3-4 dino se laga hua hu kuch samjh nahi aa raha

Focus kaam pe rakh bhai ... aur bhool ke bhi pyaar na kar baithiyo .. pata lage 2-3 saal baad meri tarah kheti kar raha ho.

 

[Kaniska]

I can clealy see..that Bukhari is trying to consolidate Muslim base and of course Modi is the best icon to get fight with...There is a saying that if also you would like to die...die fighting with a hero or brave man rather than a *****..So here the person who is fighting his political dealth is Bukhari and the brave fighter is Modiji...

 

[Sahasranama]

if anyone can give me one million dollars, i will leave india...

It would be cheaper to pay somebody a supari of couple of lakh Rupees and have you killed. ......... just saying

yes... a portable computer with a clock-less risc microprocessor of our own design...

If its clockless then why does it need RISC architecture ?

 

[jamahir]

It would be cheaper to pay somebody a supari of couple of lakh Rupees and have you killed. ......... just saying

would you kill your desi friend??

If its clockless then why does it need RISC architecture ?

good question... and technically, clock-less and risc are not related directly but seek the same end... simplification of architecture which will lead to faster execution, simpler circuit implementation and ease in programming.

but you are right... why use the word "risc"... it is just an american term to describe something opposite to unnecessarily complicated systems they themselves designed but want to keep for capitalist reasons... i will stop using "risc" and use something like "simplified design".

by industry definition - risc is simplification in instruction set and memory architecture... removing clock affects instruction execution, memory architecture, control program ( os ), i/o system, user programming and processor development.

our project has added many innovations to the above basis.

but you are right... "risc" is an american academic word used to describe systems opposite to the unnecessarily complicated systems they themselves designed but want to keep for capitalist reasons... i will stop using the word "risc" and use something like "simplified design".

 

[Sahasranama]

good question... and technically, clock-less and risc are not related directly but seek the same end... simplification of architecture which will lead to faster execution, simpler circuit implementation and ease in programming.

but you are right... why use the word "risc"... it is just an american term to describe something opposite to unnecessarily complicated systems they themselves designed but want to keep for capitalist reasons... i will stop using "risc" and use something like "simplified design".

risc is simplification in instruction set and memory architecture... removing clock affects instruction execution, memory architecture, control program ( os ), i/o system, user programming and processor development... our project has added many innovations to this basis...

RISC is used to execute one instruction per one clock cycle. Without a clock cycle, RISC is meaningless.

For asynchronous microprocessor architecture you need ST-RISC.

 

[jamahir]

RISC is used to execute one instruction per one clock cycle. Without a clock cycle, RISC is meaningless.

no... what you describe is "single-cycle processor"... it is used by risc architecture but risc can be used by clock-less designs... example, the amulet project which uses arm isa... please do google this.

For asynchronous microprocessor architecture you need ST-RISC.

i don't even know what "st-risc" means... our project ( entire portable computer including microprocesor ) is socialist in basis and technologically superior to any present design... lot of it involves moving away from "industry-accepted" designs and terminology... we don't care for the most of the present industry except for the internet.

 

[Sahasranama]

no... what you describe is "single-cycle processor"... it is used by risc architecture but risc can be used by clock-less designs... example, the amulet project which uses arm isa... please do google this.
i don't even know what "st-risc" means... our project ( entire portable computer including microprocesor ) is socialist in basis and technologically superior to any present design... lot of it involves moving away from "industry-accepted" designs and terminology... we don't care for the most of the present industry except for the internet.

Self Timed RISC. No need to google, I know what it is.

 

[jamahir]

Self Timed RISC. No need to google, I know what it is.

i was talking of the amulet clock-less arm-based project.

 

[Sahasranama]

i was talking of the amulet clock-less arm-based project.

You are using the ARM996HS processor ?

 

[jamahir]

You are using the ARM996HS processor ?

no... not us... our project is entirely a new design... it is the british "amulet" project that uses the arm996hs architecture.

correction - the british university-project "amulet" uses arm4 architecture and the arm company itself had released a clock-less design called arm996hs... ( ARM offers first clockless processor core | EE Times )... but i repeat, ours is entirely a new design with no connection to any present processor.

 

[Sahasranama]

no... not us... our project is entirely a new design... it is the british "amulet" project that uses the arm996hs architecture.

correction - the british university-project "amulet" uses arm4 architecture and the arm company itself had released a clock-less design called arm996hs... ( ARM offers first clockless processor core | EE Times )... but i repeat, ours is entirely a new design with no connection to any present processor.

You are designing a new asynchronous microprocessor ?

 

[jamahir]

You are designing a new asynchronous microprocessor ?

instruction set -- done -- less than 20 instructions.
i/o system -- new method of external data input and external data control... connection to processor is asynchronous serial.
memory system architecture -- ongoing.
alu design -- ongoing.
processor implementation -- will be on fpga.
control program ( os ) -- will be written once processor is implemented.
graphical user interface -- designed.
application programming -- applet form.

 

[Sheikh Rauf]

Truly his right to unvite who ever he wants..sudnt make an issue. And if it is for BJP then they sud solve it.. muslime of india realize their survival is in within muslim community

 

[EagleEyes]

Not your chit-chat thread, enjoy the bans.

 

[Parul]

Two wrongs don't make right. Both Bukhari and Yogi have gone bonkers.