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ICube UPU, the next step in processor evolution?

You know that the 200mm wafer fabs were built by Taiwainese, right?

China's SMIC has 40nm technology and plenty of fabs.

Semiconductor Manufacturing International Corporation - Wikipedia, the free encyclopedia

"Semiconductor Manufacturing International Corporation, (abbrev. SMIC, NYSE: SMI, SEHK: 981) is a semiconductor foundry in mainland China, providing integrated circuit (IC) manufacturing services on 350nm to 40nm process technologies. Headquartered in Shanghai, SMIC has wafer fabrication sites throughout China, offices in the U.S., Italy, Japan, and Taiwan, and a representative office in Hong Kong. Notable customers include Qualcomm, Broadcom, and Texas Instruments.[1][2][3]

Wafer Fabs

• Shanghai mega-fab: 300mm wafer fabrication facility (fab) and three 200mm wafer fabs
• Beijing mega-fab: Two 300mm wafer fabs
• Tianjin: 200mm wafer fab
• Shenzhen: 200mm wafer fab (under construction)
• Wuhan: 300mm wafer fab (owned by Wuhan Xinxin Semiconductor Manufacturing Corporation, managed and operated by SMIC)[4]"

Which part of SMIC is a "semiconductor foundry in mainland China" that you don't understand?

SMIC is a mainland Chinese company. You therefore concluded SMIC's 200mm fabs were built by Taiwanese?! What kind of stupid logic is that?
 
You pulled a fast one. You switched the topic to semiconductor manufacturing equipment.

Let's return to your original points. You said China only had 65nm technology. Not true. SMIC has 40nm technology.

You said China's first fab was built in mid-2011. Also, not true. SMIC has been in business for many years.

You're not going to admit you were wrong? There's no shame in being wrong. I make occasional mistakes too. However, I admit my errors. Will you?

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Anyway, a CPU and GPU are two completely separate units. The GPU used to be an add-on card (e.g. NVIDIA specializes in GPUs). The UPU design seems to be very unique and interesting. I'll read up on it in the next few days.

I used to bake wafers (after photoresist, masking, and etching, etc.) in quartz boats to make chips, which explains my continued interest in the semiconductor industry.
It is not. The main reason why Intel never pursued it beyond the exploratory stage was because of final die size and performance issues when compared with discrete processors like so common today. With today's consumer and business demand for greater mobility computing and smaller geometries possible, it is a different issue.
 
It is not. The main reason why Intel never pursued it beyond the exploratory stage was because of final die size and performance issues when compared with discrete processors like so common today. With today's consumer and business demand for greater mobility computing and smaller geometries possible, it is a different issue.

Doesn't change the fact that China seems to have gotten there first with the world's first UPU chip. The history books will list China as the innovator and producer of the world's first integrated CPU and GPU design, not Intel. Excuses don't count.
 
Doesn't change the fact that China seems to have gotten there first with the world's first UPU chip. The history books will list China as the innovator and producer of the world's first integrated CPU and GPU design, not Intel. Excuses don't count.
You can call it 'excuse' if you want, but to those who are in the industry, and despite your claim I doubt that you have been, we know that every manufacturer has a dedicated wafer processing line for experimental designs. Right now, am working on mid-teens nanometer scaling geometries while mass production are low-30s and high-20s. Brag all you want but we know that this, while commendable, is nothing 'unique' about it.
 
I want to thank EastWind for emphasizing the highest energy efficiency of China's UPU.

From EastWind:

"Some people are missing out on the significance -- and that is two folds:

1) UPU = CPU + GPU

2) Independently developed NEW instruction set

Debating about 64nm or 32nm is irrelevant -- because the silicon technology will naturally be "shared" among the various architecture mfg. The smaller it gets, two improvements naturally occur: 1) lower power consumption, 2) faster speeds.

Unique among this design is its simplicity (which translates to speed AND efficiency), resulting in drastically lower power consumptions (along with smaller size allows 100 cores on a single chip). Heat dissipation is a MAJOR limiting factor, and this design elegantly solves much of it."

D4kqw.jpg

China's UPU has an energy factor of 8.9. It is significantly more energy efficient than non-integrated designs. The reason is obvious. You don't need long connections to the "data buses" to transfer the data. This allows the chip to function at a lower speed for the same performance, which further reduces heat production.

You can call it 'excuse' if you want, but to those who are in the industry, and despite your claim I doubt that you have been, we know that every manufacturer has a dedicated wafer processing line for experimental designs. Right now, am working on mid-teens nanometer scaling geometries while mass production are low-30s and high-20s. Brag all you want but we know that this, while commendable, is nothing 'unique' about it.

I accept your challenge. You seem to imply that you know more about chips than I do. After the wafers have finished baking, what do you do next?

I've baked them. I can describe the procedure and reasons. Can you?
 
You pulled a fast one. You switched the topic to semiconductor manufacturing equipment.

Let's return to your original points. You said China only had 65nm technology. Not true. SMIC has 40nm technology.

You said China's first fab was built in mid-2011. Also, not true. SMIC has been in business for many years.

You're not going to admit you were wrong? There's no shame in being wrong. I make occasional mistakes too. However, I admit my errors. Will you?
China has only recently entered the doorstep of 65nm process with its own equipments. Bragging about having 40nm fab when you use imported equipment to manufacture is laughable. If that was the case, then Taiwan would be the world leader in wafer manufacturing and photolithography. Simply because China managed to have a 40nm fab based on foreign equipment, does not mean it has mastered 40nm process.

It seems to be that you have a habit of interpreting statements to your liking, then somehow claiming victory. I have yet to see you admit your errors anywhere thanks to your ego.

Anyway, a CPU and GPU are two completely separate units. The GPU used to be an add-on card (e.g. NVIDIA specializes in GPUs). The UPU design seems to be very unique and interesting. I'll read up on it in the next few days.

I used to bake wafers (after photoresist, masking, and etching, etc.) in quartz boats to make chips, which explains my continued interest in the semiconductor industry.
Thanks for telling the obvious. Appealing to authority doesn't work well on me though. China's CPUs are uncompetitive in the market without the backing of the government, pure and simple.
 
Which part of SMIC is a "semiconductor foundry in mainland China" that you don't understand?

SMIC is a mainland Chinese company. You therefore concluded SMIC's 200mm fabs were built by Taiwanese?! What kind of stupid logic is that?
You do know that TSMC, UMC and Globalfoundries are simply pure play fabs that relies on imported machines for making ICs right? It is the same case with SMIC. Even Samsung, which does most of its design in-house, requires equipment from elsewhere. ASML, Nikon and Canon dominate the market for such machines, despite not being IC manufacturers themselves.
 
China has only recently entered the doorstep of 65nm process with its own equipments. Bragging about having 40nm fab when you use imported equipment to manufacture is laughable. If that was the case, then Taiwan would be the
world leader in wafer manufacturing and photolithography. Simply because China managed to have a 40nm fab based on foreign equipment, does not mean it has mastered 40nm process.
Mastering a given process isn't any small task and the main reason why it's not as simple as investing a couple of billion dollars building a fab to challenge TSMC for marketshare. I believe entire sets for 65nm scale equipment were able to be natively produced in China almost 2 years ago and processes mastered soon after. SMIC has also fabbed production batches of 40nm ARM processors for Chinese design houses. Concerning semicon equipment, there's a long way to go but steps are being mad. There is now semicon equipment produced in China capable of down to 22 & 28nm.
 
S10, don't blame me if you're the person making false claims. For the last time:

1. You claimed China only has 65nm technology. Not true. I corrected you with a SMIC 40nm citation, because I believe it is wrong to mislead forum viewers. If you're not sure about a fact, don't make a claim. At least, say you're not sure (e.g. "I think...").

2. You claimed China's first fab was completed in mid-2011. Again, your claim is factually incorrect. It's not even close. SMIC has been operating fabs for years.

You don't have your facts straight and I had to fix your problems. Instead of thanking me, you have become defensive.

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You raised a different issue regarding China's ability to manufacture tools for the semiconductor industry. I see no reason for panic.

China's AMEC has developed a second-generation etch machine and said they will expand their offerings. You can't build a company like Applied Materials in just a few years. It will take time. Everybody knows that.

Reference: AMEC products
 
AMD and Intel's offerings are just the CPU and GPU integrated on the same die, but they are still separate heterogeneous cores with their own independent registers and caches.

That's right and the reason they have their independent registers is to avoid latency when millions of instructions are flowing from memory to processor. On a mobile platform it may be sufficient to share registers and cut the transistor count however on a high performance platform, decoding real-time instructions, it's not an ideal solution.

Anyways the point of my post was not that China copied this idea, but to reply that such ideas existed.
 
S10, don't blame me if you're the person making false claims. For the last time:

1. You claimed China only has 65nm technology. Not true. I corrected you with a SMIC 40nm citation, because I believe it is wrong to mislead forum viewers. If you're not sure about a fact, don't make a claim. At least, say you're not sure (e.g. "I think...").

2. You claimed China's first fab was completed in mid-2011. Again, your claim is factually incorrect. It's not even close. SMIC has been operating fabs for years.

You don't have your facts straight and I had to fix your problems. Instead of thanking me, you have become defensive.

----------

You raised a different issue regarding China's ability to manufacture tools for the semiconductor industry. I see no reason for panic.

China's AMEC has developed a second-generation etch machine and said they will expand their offerings. You can't build a company like Applied Materials in just a few years. It will take time. Everybody knows that.

Reference: AMEC products
You should really get an ego check, instead of trying to pretend to be the authority on everything. We've seen it all with J-20 claims before, so kindly save it. The only thing requires fixing is your mentality.

China is only capable of producing the machines to fabricate 65nm process ICs. Is this a difficult proposition to understand?

SMIC imports foreign equipments from IBM to make 40nm fab. Do you know what that means? Without foreign assistance, China cannot do it on its own. China's 40nm fab is not indigenous. China's first 65nm photolithography machine was only unveiled in mid 2011.
 
Gambit, was my last question too hard? Want to try an easier one instead?

While you are in the process of making a chip, what is probably your biggest worry and how do you solve it?

Anybody that has baked a chip should know this answer. Well, Gambit, want to give it a try at this easier question?

I spent a year baking chips and you want to challenge my experience. Go ahead smarty pants. Let's see how much you think you know about chips.

----------

Former question that appears to have been too difficult. We'll shelve this one and try a simpler one (see above).

You can call it 'excuse' if you want, but to those who are in the industry, and despite your claim I doubt that you have been, we know that every manufacturer has a dedicated wafer processing line for experimental designs. Right now, am working on mid-teens nanometer scaling geometries while mass production are low-30s and high-20s. Brag all you want but we know that this, while commendable, is nothing 'unique' about it.

I accept your challenge. You seem to imply that you know more about chips than I do. After the wafers have finished baking, what do you do next?

I've baked them. I can describe the procedure and reasons. Can you?
 
AMEC can do 22 nm or smaller with their latest tools. the company is like applied materials, Canon, nikkon, ASML. TSMC, UMC are their customers. SMIC 65 nm tools are actually from AMEC. their next indigenous mass production fab with 40 nm or smaller will also be from AMEC.
 
Gambit, was my last question too hard? Want to try an easier one instead?

While you are in the process of making a chip, what is probably your biggest worry and how do you solve it?

Anybody that has baked a chip should know this answer. Well, Gambit, want to give it a try at this easier question?

I spent a year baking chips and you want to challenge my experience. Go ahead smarty pants. Let's see how much you think you know about chips.

----------

Former question that appears to have been too difficult. We'll shelve this one and try a simpler one (see above).



I accept your challenge. You seem to imply that you know more about chips than I do. After the wafers have finished baking, what do you do next?

I've baked them. I can describe the procedure and reasons. Can you?
You must be joking, right? Or are you really that daft? It is not that difficult to find the basic wafer process flow...

How is a Wafer Fabricated / Wafer Fabrication Procedure?

But even so, every design is slightly different in the process flow. The fact that you use the word 'chip' when you are talking at the wafer level is immediately suspect. The word 'chip' is used either for popular media distribution or when a media reporter/commentator uses it himself/herself. No one who works at the wafer level uses the word 'chip' when describing his work. No one who works at the wafer level uses the word 'chip' when the word 'die' is appropriate.
 

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