SMIC Mass Produces 14nm Nodes, Advances To 5nm, 7nm
SMIC ramps up 14nm production, proceeds with sub-10nm technologies.
SMIC Mass Produces 14nm Nodes, Advances To 5nm, 7nm
By Anton Shilovpublished 2 days ago
SMIC ramps up 14nm production, proceeds with sub-10nm technologies.
Chinese state media on Thursday said that Semiconductor Manufacturing International Co. had initiated mass production of chips on its 14nm-class fabrication process at its Fab SN1 near Shanghai, China, citing a local official. Perhaps more importantly, the report also claimed that despite being unable to procure advanced chip production equipment, the company is proceeding with its 7nm and 5nm-class nodes.
"With the completion of Shanghai's industry cluster for the 14nm chips, more advanced projects in the 7nm and 5nm processes will be accelerated," said Chen Jia, a research fellow on strategy, in a conversation with state-owned Global Times(opens in new tab).
14nm Is Here, So Is N+1
SMIC has been talking about its N+1 fabrication technology(opens in new tab) - loosely considered the company's 7nm-class node — since early 2020 and described it as a low-cost alternative to TSMC's N7 node that relies on deep ultraviolet (DUV) lithography tools. N+1 aims to reduce power consumption by 57%, increase performance by 20%, and reduce the logic area by up to 55% – 63% (for select structures) compared to a similar chip implemented using SMIC's 14nm.Sponsored Links
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Recent findings from TechInsights(opens in new tab) prove that Fin Pitch (FP), Contacted Poly Pitch (CPP) and Metal 2 Pitch (M2P) sizes of SMIC’s N+1 are larger (FP) or the same as TSMC’s N10 fabrication process, which might point to the fact that this is a TSMC's N10-like technology with relaxed rules(opens in new tab), but it is not. Extensive Design Technology Co-Optimization (DTCO) features and high-density logic libraries enable a logic transistor density of 89 million transistors per square millimeter (89MT/mm^2), which is comparable to what TSMC’s N7 and Intel’s 10nm offer, making N+1 a viable 7nm-class alternative (at least for logic, as scaling SRAM is tricky).
SMIC has been producing MinerVa Semiconductor(opens in new tab)'s Bitcoin mining chip since July 2021(opens in new tab) without disclosing it. The company uses its DUV equipment to make those tiny ~25W mining chips. They are simple enough to achieve acceptable yields for commercial applications and serve as a vehicle to understand more about the process performance, power, and defect density (at least as far as logic cells are concerned).
"The manufacturing of 7nm chips in China is also progressing faster than expected," said Xiang Ligang, a technology analyst, reports state-run Global Times.
With SMIC's N+1 qualified and ready for at least limited production, it is evident that the company can live without extreme ultraviolet (EUV) production equipment which it cannot procure due to sanctions from the U.S. government. However, whether or not the company will be able to produce large and complex system-on-chips using its N+1 node is something that remains to be seen.
From a logic transistor density standpoint, SMIC's N+1 could be an alternative for TSMC's N7. However, the world's largest contract maker of chips already has far more advanced fabrication technologies that appeal to developers of highly-complex CPUs, compute GPUs, and various sophisticated data center grade chips. As a result, landing high-profile customers for N+1 could be tricky for SMIC. Remember that to serve Huawei's HiSilicon (probably the largest chip developer in China); it will need to obtain an export license from the U.S., as many tools used at SMIC's fabs come from America and Huawei is under strict sanctions.
5nm from SMIC?
SMIC briefly mentioned its N+2 technology in 2020. While this one is yet another evolutionary step from its 14nm node, China's analysts seem to label it a '5nm-class' technology since it is one step ahead of N+1, considered a '7nm-class' node. However, DUV tools with 193nm ArF laser have known limitations regarding resolution, and intensive usage of multi-patterning to lower critical dimensions of circuits affects yields.Since SMIC has been working on its N+2 node for well over two years now (and companies tend to mention new nodes when they have a more or less clear vision of their goals and ways to achieve them), it is reasonable to expect this fabrication process to come to fruition sometimes in 2023. However, since entering the U.S. government's entity list in late 2020(opens in new tab), SMIC has been keeping a low profile on any announcements about its achievement. The company only said that it would focus on developing more advanced chip packaging technologies(opens in new tab) to enable heterogeneous integration and compensate for the inability to procure equipment necessary for sub-10nm technologies.
That said, it is very intriguing to see a state media revealing SMIC's '5nm' technology in its rather detailed report about SMIC's mass production of 14nm chips.
A Convoluted Announcement
Truth to be told, SMIC has been producing chips using its 14nm-class manufacturing technology since late 2019(opens in new tab) (one of the products is Huawei's HiSilicon Kirin 710A(opens in new tab)) at its SN1 fab. Still, while formally the process caters to mass production, actual volumes were so small that at some point the company ceased to report the contribution of the node to its revenue and merged it into one category with its 28nm node, which has not been a massive contributor to the company's earnings either.Wu Jincheng, director of the Shanghai Municipal Commission of Economy and Digitalization, reiterated that SMIC had begun mass production of 14nm chips. He did not mention anything about more advanced nodes at a press conference on Wednesday, according to Global Times, which brought up 'independent' experts who spoke about N+1 (7nm-class) and N+2 (5nm-class) fabrication processes.
Since all interested parties already know about SMIC's 14nm capabilities, the state media report from Shanghai looks like a convoluted way of re-emphasizing the company's '5nm' intentions as the U.S. government's plans to strengthen restrictions against the rapidly developing Chinese semiconductor sector.
