Is semiconductor manufacturing in India an unworkable project?

[fitpOsitive]

Interesting. Which processor are you talking about ?

Some of your groups are working on RISCV processors for mobile applications. I don't know the details much, but I suspect it's some group in or aound Gujrat. Can't disclose much on that. But yes, impressive.

 

[jamahir]

Some of your groups are working on RISCV processors for mobile applications. I don't know the details much, but I suspect it's some group in or aound Gujrat. Can't disclose much on that. But yes, impressive.

Not Gujarat. I know about that project. IIT-Madras has implemented a few versions of RISC-V under the name Shakti ( Website ). And IIT-Bombay has implemented the much older SPARC under the name AJIT ( Webpage ).

They are not local designs at all and both had big material, financial and human resources invested by the government but both are foreign so I am not much impressed.

Maybe you know that I have been designing a processor for the last ten years. It is a clockless design. It will take another year I think to design the multimedia processing subsystem. At least I have been locally designing and alone.

 

[Sharma Ji]

I have to do some digging about SITAR but about SCL, they do 180 nm according to this page, though it is not specified which chip(s) they manufacture. There is one processor called ANUPAMA though I don't know about its current status.

180 is a disgrace

Moore's law ki baat ho rahi hai aaj kal, yeh sadiyon peeche hai.

I believe Intel also has 7 nm process.

And below is from this PDF thread from earlier this year :

not out yet, they're still at 14 nm

AMD has beaten them down to a pulp in the consumer market (almost 80% share if not more, they came from nowhere) intel still leads in the server space but is fast losing that ground too. Check the specs on the epyc chips

this has to be among the most incredible turnarounds we have ever seen, Lisa Su is such a boss !

 

[fitpOsitive]

Not Gujarat. I know about that project. IIT-Madras has implemented a few versions of RISC-V under the name Shakti ( Website ). And IIT-Bombay has implemented the much older SPARC under the name AJIT ( Webpage ).

They are not local designs at all and both had big material, financial and human resources invested by the government but both are foreign so I am not much impressed.

Maybe you know that I have been designing a processor for the last ten years. It is a clockless design. It will take another year I think to design the multimedia processing subsystem. At least I have been locally designing and alone.

Gujrat is confirmed. May be it is not RISCV. some other processesor. But you know such informations are top secret. So..
Here is a prediction. In some years, may be 10 years from today, we will see another Bill gates like person, a billionaire, who will offer next piece of software, that will change this whole world. And IBM will be at heart of it, as in case of windows.

 

[jamahir]

Gujrat is confirmed.

You are correct actually. I just remembered that HSMC had done a ground breaking ceremony some years ago at the site in Gujarat where their fab was to be constructed. But HSMC pulled out from the agreement with the central government.

Here is a prediction. In some years, may be 10 years from today, we will see another Bill gates like person, a billionaire, who will offer next piece of software, that will change this whole world. And IBM will be at heart of it, as in case of windows.

I wish to contribute to that.

 

[Sharma Ji]

what's a clockless processor ? how will we gauge performance in terms of IPC then ?

not an expert on the hardware, just a computer nerd who loves building PCs so I have some cursory knowledge on chips and clock speeds etc.

@jamahir

 

[jamahir]

what's a clockless processor ?

In simple words :

In a clocked processor ( like say 2.4 GHz ) the main components ( not including peripherals like the PCI bus or Ethernet port ) have to run at the same clock speed ( say 2.4 GHz ). There will be a clock line whose signal ( rise or fall - 1 or 0 ) will signal the processor's main components to schedule the next stage ( like say send the next instruction to the ALU.

In a clock-less processor there is no global clock for the processor's main components. What will be present is a special signal line called Handshake Line connected to each main component of the processor. For example, when the ALU finishes execution of one instruction it will signal on the Handshake Line of the instruction cache to send the next instruction on the ALU-ICache bus.​

Below is a section from the Wikipedia page for "Asynchronous circuits" :

• components can run at different speeds on an asynchronous CPU; all major components of a clocked CPU must remain synchronized with the central clock;
• a traditional CPU cannot "go faster" than the expected worst-case performance of the slowest stage/instruction/component. When an asynchronous CPU completes an operation more quickly than anticipated, the next stage can immediately begin processing the results, rather than waiting for synchronization with a central clock. An operation might finish faster than normal because of attributes of the data being processed (e.g., multiplication can be very fast when multiplying by 0 or 1, even when running code produced by a naive compiler), or because of the presence of a higher voltage or bus speed setting, or a lower ambient temperature, than 'normal' or expected.

how will we gauge performance in terms of IPC then ?

What do you mean by IPC ?

 

[Sharma Ji]

In simple words :

In a clocked processor ( like say 2.4 GHz ) the main components ( not including peripherals like the PCI bus or Ethernet port ) have to run at the same clock speed ( say 2.4 GHz ). There will be a clock line whose signal ( rise or fall - 1 or 0 ) will signal the processor's main components to schedule the next stage ( like say send the next instruction to the ALU.

In a clock-less processor there is no global clock for the processor's main components. What will be present is a special signal line called Handshake Line connected to each main component of the processor. For example, when the ALU finishes execution of one instruction it will signal on the Handshake Line of the instruction cache to send the next instruction on the ALU-ICache bus.
Below is a section from the Wikipedia page for "Asynchronous circuits" :

appreciate you trying to explain but upar se nikal gaya, most of it lol

What do you mean by IPC ?

Instructions per clock

https://en.wikipedia.org/wiki/Instructions_per_cycle

In computer architecture, instructions per cycle (IPC), commonly called instructions per clock is one aspect of a processor's performance: the average number of instructions executed for each clock cycle. It is the multiplicative inverse of cycles per instruction.

 

[jamahir]

appreciate you trying to explain but upar se nikal gaya, most of it lol

I suggest to read this Wikipedia page for Asynchronous Circuit. It is not accessible for me at the moment. I don't know about you. My previous quoting of it was from Google's cache.

Instructions per clock

https://en.wikipedia.org/wiki/Instructions_per_cycle

Performance will have to be judged at OS level. At the moment there are very few clockless processors to be used as benchmark ( performance comparisons ).

Here I am also assuming a multicore clockless processor.

And please read this ( "Asynchronous" is the same as "Clockless" ) :

Benefits

A variety of advantages have been demonstrated by asynchronous circuits, including both quasi-delay-insensitive (QDI) circuits (generally agreed to be the most "pure" form of asynchronous logic that retains computational universality) and less pure forms of asynchronous circuitry which use timing constraints for higher performance and lower area and power:

• Robust handling of metastability of arbiters.
• Higher performance function units, which provide average-case (i.e. data-dependent) completion rather than worst-case completion. Examples include speculative completion[8][9] which has been applied to design parallel prefix adders faster than synchronous ones, and a high-performance double-precision floating point adder[10]which outperforms leading synchronous designs.
• Early completion of a circuit when it is known that the inputs which have not yet arrived are irrelevant.
• Lower power consumption because no transistor ever transitions unless it is performing useful computation. Epson has reported 70% lower power consumption compared to synchronous design.[11] Also, clock drivers can be removed which can significantly reduce power consumption. However, when using certain encodings, asynchronous circuits may require more area, which can result in increased power consumption if the underlying process has poor leakage properties (for example, deep submicrometer processes used prior to the introduction of high-κ dielectrics).
• "Elastic" pipelines, which achieve high performance while gracefully handling variable input and output rates and mismatched pipeline stage delays.[12]
• Freedom from the ever-worsening difficulties of distributing a high-fan-out, timing-sensitive clock signal.
• Better modularity and composability.
• Far fewer assumptions about the manufacturing process are required (most assumptions are timing assumptions).
• Circuit speed adapts to changing temperature and voltage conditions rather than being locked at the speed mandated by worst-case assumptions.
• Immunity to transistor-to-transistor variability in the manufacturing process, which is one of the most serious problems facing the semiconductor industry as dies shrink.
• Less severe electromagnetic interference (EMI). Synchronous circuits create a great deal of EMI in the frequency band at (or very near) their clock frequency and its harmonics; asynchronous circuits generate EMI patterns which are much more evenly spread across the spectrum.
• In asynchronous circuits, local signaling eliminates the need for global synchronization which exploits some potential advantages in comparison with synchronous ones. They have shown potential specifications in low power consumption, design reuse, improved noise immunity and electromagnetic compatibility. Asynchronous circuits are more tolerant to process variations and external voltage fluctuations.
• Less stress on the power distribution network. Synchronous circuits tend to draw a large amount of current right at the clock edge and shortly thereafter. The number of nodes switching (and thence, amount of current drawn) drops off rapidly after the clock edge, reaching zero just before the next clock edge. In an asynchronous circuit, the switching times of the nodes are not correlated in this manner, so the current draw tends to be more uniform and less bursty.

 

[nahtanbob]

semiconductor manufacturing is capital intensive. the capital put in semiconductor manufacturing has higher rate of return in other areas

 

[jamahir]

semiconductor manufacturing is capital intensive.

But it has strategic value for a country like India whose some people want to balance between the Western bloc and the Eastern bloc.

the capital put in semiconductor manufacturing has higher rate of return in other areas

You mean spin-offs ? What types for example ?

 

[denel]

But it has strategic value for a country like India whose some people want to balance between the Western bloc and the Eastern bloc.



You mean spin-offs ? What types for example ?

semi-conductors are a very strategic industry; you have the manpower, so why not especially there is a huge demand too.

 

[jamahir]

so why not especially there is a huge demand too.

Correct.

semi-conductors are a very strategic industry; you have the manpower

Unfortunately the couple of hundred thousand computer engineers graduating in India every year in the past twenty years has not transformed into even a single creation of the two fundamental elements in a computer : the operating system and the microprocessor. There has been no indigenous / local design of those two items. Two processor projects ( named Shakti and AJIT ) developed recently have been of foreign design ( RISC-V and SPARC respectively ).

I can speak generally authoritatively on this because I have been designing a processor for some years. When it develops to a mature stage there will have to be a new OS built for it too and the needed app ecosystem.

So to answer your point, India has lot of manpower in this field but they need to be guided by someone more ambitious.

 

[Arulmozhi Varman]

Not Gujarat. I know about that project. IIT-Madras has implemented a few versions of RISC-V under the name Shakti ( Website ). And IIT-Bombay has implemented the much older SPARC under the name AJIT ( Webpage ).

They are not local designs at all and both had big material, financial and human resources invested by the government but both are foreign so I am not much impressed.

Maybe you know that I have been designing a processor for the last ten years. It is a clockless design. It will take another year I think to design the multimedia processing subsystem. At least I have been locally designing and alone.

Any microprocessors or microcontroller use an established architecture. Like USB C charging device for mobiles. You can't say if one new company comes with that charger saying it's copying. Its not. Its just a set standards.

While IIT projects are not cutting edge, the problem is not design or testing. India has lots of companies (even Indian ones) doing design and testing work for companies like Qualcomm, Intel and many mid level logical IC companies etc. My friend is working in them. But the problem is everytime an new chip is designed or mod is done, they have to get to Taiwan or US to have that chip fabricated for testing.

Another thing being, Chip being capital intensive manufacturing, consumes a lot of water too. One chip factory is more than enough to cater to an entire continent. TSMC churns out billion chips of different companies per year alone. And it has probably 2-3 plants. So until unless India starts to export more in terms of electronic hardware, chip companies will then be "forced" to invest in India for cheaper duties and making profits. India exported 35000 crores of electronics products last year. That's like less than 5B of exports and probably had more 15B of domestic consumption. Compare to China or Taiwan. They simply export more than 300B of electronics every year. Until unless we reach similar level of exports or domestic consumption no company will invest in a fab in India. Intel came close to establishing a fab in 2006 with Maran was minister when Jaya thwarted his attempt to establish the factory in Chennai. They went to Vietnam.

In this case, the govt has to start an company and then slowly disinvest over the years or start an JV with private sector with govt holding 49% to avoid govt exams for recruitment. That's the only way. Even then chips manufactured has to be consumed by our domestic industry for exports. There are lots of IC which anyone can manufacture by paying IP rights which are less like 0.01 to 0.10 cents to a chip. But demand has to be there.

 

[nahtanbob]

Correct.



Unfortunately the couple of hundred thousand computer engineers graduating in India every year in the past twenty years has not transformed into even a single creation of the two fundamental elements in a computer : the operating system and the microprocessor. There has been no indigenous / local design of those two items. Two processor projects ( named Shakti and AJIT ) developed recently have been of foreign design ( RISC-V and SPARC respectively ).

I can speak generally authoritatively on this because I have been designing a processor for some years. When it develops to a mature stage there will have to be a new OS built for it too and the needed app ecosystem.

So to answer your point, India has lot of manpower in this field but they need to be guided by someone more ambitious.

there are lots of low hanging fruits where more money can be made and more value can be added