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C-DAC Develops India’s First Indigenous Arm-Based CPUs: Flagship AUM Chip With 96 Cores, 96 GB HBM3, 320W TDP, 2024 Launch

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India's Center for Development of Advanced Computing (C-DAC) recently announced that it was working on a series of ARM-based CPUs including the flagship AUM chip. Now, the company has revealed the first details of its AUM CPU which will be aimed at the HPC segment.

India Readies C-DAC AUM, A Dual-Chiplet CPU Housing 96 ARM Cores, 96 GB HBM3, 128 PCIe Gen 5 Lanes & 320W TDP
C-DAC said that there are working on a multiple range of options for domestic applications that will scale from chips that power smart devices, IoT, AR/VR up to HPC and data center use. Its Vega CPU series which is based on dual and quad-core designs will target entry-level clients that require low-power and low-cost chips and will cover at least 10% of India's chip requirement. The company will also prep its octa-core chips within the next three years as a follow-up to Dhruv and Dhanush Plus chips.
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But that's not all, the company is also working on a power-efficient HPC chip that will be aiming the large-scale workloads as a part of the National Supercomputing Mission (NSM) program. This chip is going to be called the C-DAC AUM.

The C-DAC AUM CPU is based on the ARM Neoverse V1 core architecture codenamed Zeus. There are a total of 96 cores on the AUM chip but there are divided into two chiplets, each housing 48 V1 cores. Each chiplet has its own memory, I/O, C2C/D2D interconnect, cache, security, and MSCP sub-systems. The two A48Z-based chiplets are connected together using a D2D chiplet interconnect on the same interposer. Each chip also carries 96 MB of L2 cache and 96 MB of system cache.
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For memory, the C-DAC AUM CPU uses 64 GB HBM3-5600 while also packing 96 GB HBM3 memory on-die and 8-channel DDR5-5200 memory (scalable up to 16-channels for up to 332.8 GB/s of total bandwidth).

That's a triple-memory subsystem with on-die, inter-poser, and off-chip memory solutions. The CPU will carry 64/128 PCIe Gen 5 lanes with support for CXL and run on a platform that can incorporate two of these chips. The CPU will be fabricated on the TSMC 5nm process node. Clock speeds are said to range between 3.0 - 3.5 GHz. A CPU-only node featuring the C-DAC AUM will deliver up to 10 TFLOPs performance per node, 4.6+ TFLOPs per socket, and a dual-socket server design can support up to 4 industry standard GPU accelerators.
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C-DAC will also be preparing a set of HPC System Software and development tools for leveraging the full potential of its hardware. The company expects to achieve 64 PetaFlops of compute power within the country by the end of 2024. The AUM chip is expected to hit shelves by 2023-2024.


@Skull and Bones @Cheepek @Raj-Hindustani @ni8mare @MilSpec @CallSignMaverick
@migflug
 
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"Indigenous ARM-based CPU".

OK.

And "AUM" / OM.

OK.
 
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Good to see they have designed the processor keeping the gate length at 5 nm node, so only TSMC can fabricate it for the time being.

They have not designed but assembled. ARM company can say it has designed the processor. Whoever thought-up HBM memory can say that they have designed HBM memory. But CDAC can only say that it has assembled this processor.

And "very secular" to name this assemblage as Aum.
 
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They have not designed but assembled. ARM company can say it has designed the processor. Whoever thought-up HBM memory can say that they have designed HBM memory. But CDAC can only say that it has assembled this processor.

And "very secular" to name this assemblage as Aum.
Bro lego nahi hein, it's not like taking the cores and assembling then on some board or something

They have to design everything around from memory controllers, interfaces to other components like idk usb, pcie lanes n stuff

All of this integrated, then fabricate it etc
 
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Bro lego nahi hein, it's not like taking the cores and assembling then on some board or something

They have to design everything around from memory controllers, interfaces to other components like idk usb, pcie lanes n stuff

All of this integrated, then fabricate it etc

Sir, of course it's more complicated than clicking on Lego pieces. And it's complicated too than designing their own design - something different and radical. Designing own would have taken work and time but would have made life easy and would have been respectable.

I am notorious on the forum for claiming various things :D and I will claim such knowledge so I know. :)

This group which designed this Aum just picked up people who gained experience in others' work. And they picked up software tools to smash these available things together in visualization form and they would have used an available FPGA to realize the prototype in physical form.

Let me call in our Pakistani knower-of-all-things-processor Mr. @ssethii to lend his "vast experience and supreme intelligence" to this discussion. :D
 
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View attachment 929752
India's Center for Development of Advanced Computing (C-DAC) recently announced that it was working on a series of ARM-based CPUs including the flagship AUM chip. Now, the company has revealed the first details of its AUM CPU which will be aimed at the HPC segment.

India Readies C-DAC AUM, A Dual-Chiplet CPU Housing 96 ARM Cores, 96 GB HBM3, 128 PCIe Gen 5 Lanes & 320W TDP
C-DAC said that there are working on a multiple range of options for domestic applications that will scale from chips that power smart devices, IoT, AR/VR up to HPC and data center use. Its Vega CPU series which is based on dual and quad-core designs will target entry-level clients that require low-power and low-cost chips and will cover at least 10% of India's chip requirement. The company will also prep its octa-core chips within the next three years as a follow-up to Dhruv and Dhanush Plus chips.
View attachment 929754

But that's not all, the company is also working on a power-efficient HPC chip that will be aiming the large-scale workloads as a part of the National Supercomputing Mission (NSM) program. This chip is going to be called the C-DAC AUM.

The C-DAC AUM CPU is based on the ARM Neoverse V1 core architecture codenamed Zeus. There are a total of 96 cores on the AUM chip but there are divided into two chiplets, each housing 48 V1 cores. Each chiplet has its own memory, I/O, C2C/D2D interconnect, cache, security, and MSCP sub-systems. The two A48Z-based chiplets are connected together using a D2D chiplet interconnect on the same interposer. Each chip also carries 96 MB of L2 cache and 96 MB of system cache.
View attachment 929753
For memory, the C-DAC AUM CPU uses 64 GB HBM3-5600 while also packing 96 GB HBM3 memory on-die and 8-channel DDR5-5200 memory (scalable up to 16-channels for up to 332.8 GB/s of total bandwidth).

That's a triple-memory subsystem with on-die, inter-poser, and off-chip memory solutions. The CPU will carry 64/128 PCIe Gen 5 lanes with support for CXL and run on a platform that can incorporate two of these chips. The CPU will be fabricated on the TSMC 5nm process node. Clock speeds are said to range between 3.0 - 3.5 GHz. A CPU-only node featuring the C-DAC AUM will deliver up to 10 TFLOPs performance per node, 4.6+ TFLOPs per socket, and a dual-socket server design can support up to 4 industry standard GPU accelerators.
View attachment 929755
C-DAC will also be preparing a set of HPC System Software and development tools for leveraging the full potential of its hardware. The company expects to achieve 64 PetaFlops of compute power within the country by the end of 2024. The AUM chip is expected to hit shelves by 2023-2024.


@Skull and Bones @Cheepek @Raj-Hindustani @ni8mare @MilSpec @CallSignMaverick
@migflug
Will cover at least 10% of India's requirements, if we get our own semiconductor production and OSAT industry we'll be significantly self reliant on our semiconductor demands.
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Good development given all the subsystems and necessary technologies are readily available off the shelf, no need to re-invent the wheel. kudos.
 
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